research-article

DA-RAID-5: a disturb aware data protection technique for NAND flash storage systems

Authors:

Yaojun Zhang Li,

Yiran ChenAuthors Info & Claims

DATE '13: Proceedings of the Conference on Design, Automation and Test in Europe

Pages 380 - 385

Published: 18 March 2013 Publication History

Abstract

Program disturb, read disturb and retention time limit are three major reasons accounting for the bit errors in NAND flash memory. The adoption of multi-level cell (MLC) technology and technology scaling further aggravates this reliability issue by narrowing threshold voltage noise margins and introducing larger device variations. Besides implementing error correction code (ECC) in NAND flash modules, RAID-5 are often deployed at system level to protect the data integrity of NAND flash storage systems (NFSS), however, with significant performance degradation. In this work, we propose a technique called "DA-RAID-5" to improve the performance of the enterprise NFSS under RAID-5 protection without harming its reliability (here DA stands for "disturb aware"). Three schemes, namely, unbound-disturb limiting (UDL), PE-aware RAID-5 and Hybrid Caching(HC) are proposed to protect the NFSS at the different stages of its lifetime. The experimental results show that compared to the best prior work, DA-RAID-5 can improve the NFSS response time by 9.7% on average.

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Cited By

Pan CHo CChang YKuo TChang YYang MHaddad HWainwright RChbeir R(2018)Boosting the performance with a data-backup-free programming scheme for TLC-based SSDsProceedings of the 33rd Annual ACM Symposium on Applied Computing10.1145/3167132.3167171(351-358)Online publication date: 9-Apr-2018
https://dl.acm.org/doi/10.1145/3167132.3167171
Guo JWang DShao ZChen Y(2017)Data-Pattern-Aware Error Prevention Technique to Improve System ReliabilityIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.264205525:4(1433-1443)Online publication date: 1-Apr-2017
https://dl.acm.org/doi/10.1109/TVLSI.2016.2642055
Guo JWen WHu JWang DLi HChen Y(2015)FlexLevelProceedings of the 52nd Annual Design Automation Conference10.1145/2744769.2744843(1-6)Online publication date: 7-Jun-2015
https://dl.acm.org/doi/10.1145/2744769.2744843

Index Terms

DA-RAID-5: a disturb aware data protection technique for NAND flash storage systems
1. Hardware

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Information & Contributors

Information

Published In

cover image ACM Conferences

DATE '13: Proceedings of the Conference on Design, Automation and Test in Europe

March 2013

1944 pages

ISBN:9781450321532

General Chair:
Enrico Macii
Politecnico di Torino, IT

Sponsors

EDAA: European Design Automation Association
ECSI
EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE CEDA
The Russian Academy of Sciences: The Russian Academy of Sciences

Publisher

EDA Consortium

San Jose, CA, United States

Publication History

Published: 18 March 2013

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DATE 13

Sponsor:

EDAA
EDAC
SIGDA
The Russian Academy of Sciences

DATE 13: Design, Automation and Test in Europe

March 18 - 22, 2013

Grenoble, France

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Cited By

Pan CHo CChang YKuo TChang YYang MHaddad HWainwright RChbeir R(2018)Boosting the performance with a data-backup-free programming scheme for TLC-based SSDsProceedings of the 33rd Annual ACM Symposium on Applied Computing10.1145/3167132.3167171(351-358)Online publication date: 9-Apr-2018
https://dl.acm.org/doi/10.1145/3167132.3167171
Guo JWang DShao ZChen Y(2017)Data-Pattern-Aware Error Prevention Technique to Improve System ReliabilityIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.264205525:4(1433-1443)Online publication date: 1-Apr-2017
https://dl.acm.org/doi/10.1109/TVLSI.2016.2642055
Guo JWen WHu JWang DLi HChen Y(2015)FlexLevelProceedings of the 52nd Annual Design Automation Conference10.1145/2744769.2744843(1-6)Online publication date: 7-Jun-2015
https://dl.acm.org/doi/10.1145/2744769.2744843

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