We developed a method that predicts the required number of cores for executing threads in the near future on a many-core processor. It is designed for low power consumption without performance degradation. The evaluation result confirmed the proposed method is effective on a 32-cores processor.

References

[1]

H. Xu, J. Tanabe, H. Usui, S. Hosoda, T. Sano, K. Yamamoto, et al., "A Low Power Many-Core SoC with Two 32-Core Clusters Connected by Tree Based NoC for Multimedia Applications", SYMPOSIUM ON VLSI CIRCUITS, pages 150--151, 2012.

Google Scholar

[2]

T. Kodaka, S. Sasaki, T. Tokuyoshi, R. Ohyama, N. Nonogaki, K. Kitayama, et al., "Design and Implementation of Scalable, Transparent Threads for Multi-Core Media Processor", in Proc. of the Conf. on DATE, pages 1035--1039, 2009.

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Index Terms

A near-future prediction method for low power consumption on a many-core processor
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
2. Hardware

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Published In

DATE '13: Proceedings of the Conference on Design, Automation and Test in Europe

March 2013

1944 pages

ISBN:9781450321532

General Chair:
Enrico Macii
Politecnico di Torino, IT

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EDA Consortium

San Jose, CA, United States

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Published: 18 March 2013

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DATE 13

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DATE 13: Design, Automation and Test in Europe

March 18 - 22, 2013

Grenoble, France

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Vectorizing Unstructured Mesh Computations for Many-core Architectures

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