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Bootstrapped full--swing CMOS driver for low supply voltage operation

Published: 06 March 2006 Publication History

Abstract

This paper reports a high speed and low power consumption direct--indirect bootstrapped full--swing CMOS inverter driver circuit (bfi--driver). The simulation results, based on 0.13μm triple well CMOS technology, show that, when operated at 1V, bfi--driver is 94% faster and consumes 22% less power compared to a counterpart direct bootstrap circuit [1].

References

[1]
A. Bellaouar, M. I. Elmasry and S. H. K. Embabi, "Boot strapped full--swing BiCMOS/BiNMOS logic circuits for 1.2--3.3V supply voltage regime," IEEE J. Solid--State Circuits, vol. 30, no. 6, pp. 629--636, June 1995.
[2]
J. H. Lou, and J. B. Kuo, "1.5V CMOS and BiCMOS Boot strapped Dynamic Logic Circuits Suitable for Low--Voltage VLSI," VLSI Technology, Systems, and Aplications, pp. 279--282, June 1997.
[3]
J. C. García, J. A. Montiel-Nelson, J. Sosa and H. Navarro, "A direct bootstrapped CMOS large capacitive--load driver circuit," Design, Automation and Test in Europe Conference and Exhibition, vol. 1, pp. 680--681, Feb. 2004.

Cited By

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  • (2009)CMOS driver-receiver pair for low-swing signaling for low energy on-chip interconnectsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2008.200454917:2(311-316)Online publication date: 1-Feb-2009
  • (2009)CMOS design and analysis of low-voltage signaling methodology for energy efficient on-chip interconnectsMicroelectronics Journal10.1016/j.mejo.2008.12.00340:11(1571-1581)Online publication date: 1-Nov-2009

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Information

Published In

cover image Guide Proceedings
DATE '06: Proceedings of the conference on Design, automation and test in Europe: Proceedings
March 2006
1390 pages
ISBN:3981080106

Sponsors

  • EDAA: European Design Automation Association
  • The EDA Consortium
  • IEEE-CS\DATC: The IEEE Computer Society

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European Design and Automation Association

Leuven, Belgium

Publication History

Published: 06 March 2006

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DATE '06 Paper Acceptance Rate 267 of 834 submissions, 32%;
Overall Acceptance Rate 518 of 1,794 submissions, 29%

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  • (2009)CMOS driver-receiver pair for low-swing signaling for low energy on-chip interconnectsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2008.200454917:2(311-316)Online publication date: 1-Feb-2009
  • (2009)CMOS design and analysis of low-voltage signaling methodology for energy efficient on-chip interconnectsMicroelectronics Journal10.1016/j.mejo.2008.12.00340:11(1571-1581)Online publication date: 1-Nov-2009

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