| Article | |
| Title | Validation of the 65 nm TPSCo CMOS imaging technology for the ALICE ITS3 |
| Author(s) | Ferrero, C (Polytech. Turin ; INFN, Turin) |
| Collaboration | ALICE Collaboration |
| Publication | 2024 |
| Number of pages | 7 |
| In: | JINST 19, 04 (2024) pp.C04043 |
| In: | Topical Workshop on Electronics for Particle Physics 2023 (TWEPP 2023), Geremeas, Sardinia, Italy, 1 - 6 Oct 2023, pp.C04043 |
| DOI | 10.1088/1748-0221/19/04/C04043 |
| Subject category | Particle Physics - Experiment ; Nuclear Physics - Experiment ; Detectors and Experimental Techniques |
| Accelerator/Facility, Experiment | CERN LHC ; ALICE |
| Abstract | During the next Long Shutdown (LS3) of the LHC, planned for 2026, the innermost three layers of the ALICE Inner Tracking System will be replaced by a new vertex detector composed of curved ultra-thin monolithic silicon sensors. The R&D; initiative on monolithic sensors of the CERN Experimental Physics Department, in cooperation with the ALICE ITS3 upgrade project, prepared the first submission of chip designs in the TPSCo 65 nm technology, called MLR1 (Multi Layer Reticle). It contains four different test structures with different process splits and pixel designs. These proceedings illustrate the first validation of the technology in terms of pixel performance and radiation hardness. |
| Copyright/License | © 2024 The authors (License: CC-BY-4.0) |
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Record created 2024-10-18, last modified 2024-10-18