Abstract
| As part of the High Luminosity LHC (HL-LHC) project, the SPS (LHC injector) Low Level RF has been completely re-designed. Part of this project is a system that can measure the phase of each individual bunch (5 ns spacing), to be used for both diagnostic and as input to the Beam-Based phase loop. The system uses a 5 G samples per second (Gsps) ADC mezzanine card, mounted on the motherboard with a System On Chip (SOC) FPGA for the processing, all electronics on a uTCA platform. The paper presents the motivations for this upgrade, the overall architecture (RF frequency distributed via a White Rabbit link), the main algorithms, the hardware and the firmware. |