Abstract
| Tracking detectors based on segmented semiconductor sensors have been present in high-energy physics experiments for more than 40 years. The development of these sensors was always strongly linked to advances in CMOS technologies that offer features supporting the design of specialized ASICs for readout purposes. While in the beginning, the front-end electronics only provided simple signal reception and amplification, sending out the raw analog data, growing demands from the experiments lead designers to begin directly integrating more advanced features for data processing and storage, power management, calibration functions, amongst others, on-chip. This development was, and continues to be, possible due to CMOS technology evolution, in particular the scaling. Besides higher speed and better transconductance, today’s sub-micron processes offer intrinsic ionizing radiation tolerance which, together with Single Event Effect (SEE) hardening techniques, allows design for reliable operation in a harsh radiation environment. Despite the enhanced functionality and greater number of transistors, higher time resolution and, in consequence, faster analog shaping and readout speed, the power consumption of typical front-end electronics measured per area of tracking detector remains of the order of a few tens of mW per square centimeter. The basic architecture of the input stage has also remained practically the same over the last 40 years. The optimal solution providing wide bandwidth and high open-loop gain at minimum power is the cascode: a cascade of common-source and common-gate amplifiers. Although each particular implementation differs slightly depending on the specific requirements and process used, the core of the preamplifier remains the same since its conception. |