Published August 18, 2018
| Version v1
Technical note
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Temperature Control When Testing the RD53 Chip in the Lab (Technical Report)
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Description
The phase II readout chip (RoC) for Si-detectors generates a significant amount of heat during operation, typically around 2W but hypothetically up to 8W. For the purposes of in-lab testing, I developed a temperature control system for the chip based on a Peltier chiller and a control loop. I describe the implementation details of the system along with some metrics of the system's performance. This report is intended as an in-lab guide for those who will be using the system.
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Abbreviations: RD53 is developing the tools and designs needed to produce the next generation of pixel readout chips needed by ATLAS and CMS at the HL-LHC.Files
Temperature Control When Testing the RD53 Chip in the Lab.pdf
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Additional details
Identifiers
- CDS Reference
- CERN-STUDENTS-Note-2018-054