| Αρχική Σελίδα > The Gigatracker: An ultra-fast and low-mass silicon pixel detector for the NA62 experiment |
| Article | |
| Title | The Gigatracker: An ultra-fast and low-mass silicon pixel detector for the NA62 experiment |
| Author(s) | Fiorini, M (CERN) ; Carassiti, V (INFN, Ferrara) ; Morel, M (CERN) ; Petrucci, F (INFN, Ferrara) ; Marchetto, F (INFN, Turin) ; Garbolino, S (INFN, Turin) ; Cortina, E (Louvain U.) ; Tiuraniemi, S (CERN) ; Ceccucci, A (CERN) ; Martin, E (Louvain U.) ; Riedler, P (CERN) ; Martoiu, S (INFN, Turin) ; Ramusino, A C (INFN, Ferrara) ; Rinella, G A (CERN) ; Mapelli, A (CERN ; Ecole Polytechnique, Lausanne) ; Mazza, G (INFN, Turin) ; Noy, M (CERN) ; Jarron, P (CERN) ; Nuessle, G (Louvain U.) ; Dellacasa, G (INFN, Turin) ; Kluge, A (CERN) ; Rivetti, A (INFN, Turin) ; Kaplon, J (CERN) |
| Publication | 2011 |
| Note | 12th International Vienna Conference on Instrumentation, Vienna, AUSTRIA, FEB 15-20, 2010 |
| In: | Nucl. Instrum. Methods Phys. Res., A 628 (2011) 292-295 |
| In: | 12th Vienna Conference on Instrumentation, Vienna, Austria, 15 - 20 Feb 2010, pp.292-295 |
| DOI | 10.1016/j.nima.2010.06.338 |
| Subject category | Detectors and Experimental Techniques |
| Accelerator/Facility, Experiment | CERN SPS ; NA62 |
| Abstract | The Gigatracker is a hybrid silicon pixel detector developed to track the highly intense NA62 hadron beam with a time resolution of 150 ps (rms). The beam spectrometer of the experiment is composed of three Gigatracker stations installed in vacuum in order to precisely measure momentum, time and direction of every traversing particle. Precise tracking demands a very low mass of the detector assembly (<0.5\% X(O) per station) in order to limit multiple scattering and beam hadronic interactions. The high rate and especially the high timing precision requirements are very demanding: two R&D options are ongoing and the corresponding prototype read-out chips have been recently designed and produced in 0.13 mu m CMOS technology. One solution makes use of a constant fraction discriminator and on-pixel analogue-based time-to-digital-converter (TDC); the other comprises a delay-locked loop based TDC placed at the end of each pixel column and a time-over-threshold discriminator with time-walk correction technique. The current status of the R&D program is overviewed and results from the prototype read-out chips test are presented. (C) 2010 Elsevier B.V. All rights reserved. |